[展覽-DesignCon 2018] Atiatec's De-Embedding solution will demo in DesignCon 2018

We would like to invite you for visiting Ataitec in DesignCon 2018. For more informatin, please see the below:

You are cordially invited to visit AtaiTec at DesignCon Booth #600 to see how to use In-Situ De-embedding (ISD), Advanced SI Design Kit (ADK) and Material Property Extractor (MPX) to:

Perform causal and skewless de-embedding
Extract spikes-free PCB trace attenuation
Compare ISD and Delta-L results
Correlate DUT results between measurement and simulation
Process S parameters and run channel simulation
Extract PCB material property (DK, DF and roughness)
And more

You are most welcome to attend the following free seminar sponsored by Rohde & Schwarz:

"In-Situ De-embedding" by C.C. Huang (AtaiTec) and D. Lin (Nvidia), 01/31/2018 (Wed), 9:20am – 10:00am, Great America Meeting Room 2.

Abstract - Traditional de-embedding methods can give non-causal errors in device-under-test (DUT) results if the test fixture and calibration structure have different impedances. This presentation introduces In-Situ De-embedding (ISD) to address such impedance differences using software instead of hardware, thereby improving de-embedding accuracy while reducing hardware costs. Correlation, compliance testing, Delta-L solution, DK/DF extraction and skewless de-embedding will all be discussed.

and follow these papers we co-authored:

"Hacking skew measurement," 01/31/2018 (Wed), 2:50pm – 3:30pm, Ballroom E.
"A NIST traceable PCB kit for evaluating the accuracy of de-embedding algorithms and corresponding metrics," 02/01/2018 (Thu), 11:00 am – 11:45 am, Ballroom G.

Click here to get a complimentary Expo pass.

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